ModelSim won't compile package files

Altera_Forum · ‎09-06-2011

Hello, all! I'm a new poster here. So far I have managed to fix all my errrors simply by reading, but I stumbled upon a problem I can't solve.

I am using ModelSim 6.5e and I have a 5-file project. I have moved all the constants to a separate package file. I am using the following way to declare entities:

uartRxUnit: entity work.uartRx(archUartRx)
		generic map(DBIT=>DBIT, SB_TICK=>SB_TICK)
		port map(clk=>clk, reset=>reset, rx=>rx, s_tick=>baudTick, rx_done_tick=>rx_done_tick,
					dout=>rx_data_out);

Then I get the following errors:

vcom -work default -2002 -explicit D:/altera/10.0/alex_thesis/uart.vhd
Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package numeric_std
-- Compiling entity uart
-- Compiling architecture archuart of uart
** Error: (vcom-11) Could not find work.uartrx.
** Error: D:/altera/10.0/alex_thesis/uart.vhd(44): (vcom-1195) Cannot find expanded name "work.uartrx".
** Error: D:/altera/10.0/alex_thesis/uart.vhd(44): Unknown expanded name.
** Error: (vcom-11) Could not find work.uarttx.
** Error: D:/altera/10.0/alex_thesis/uart.vhd(49): (vcom-1195) Cannot find expanded name "work.uarttx".
** Error: D:/altera/10.0/alex_thesis/uart.vhd(49): Unknown expanded name.
-- Loading entity fifo
** Error: (vcom-11) Could not find work.baudgen.
** Error: D:/altera/10.0/alex_thesis/uart.vhd(65): (vcom-1195) Cannot find expanded name "work.baudgen".
** Error: D:/altera/10.0/alex_thesis/uart.vhd(65): Unknown expanded name.
** Error: D:/altera/10.0/alex_thesis/uart.vhd(70): VHDL Compiler exiting

Also, wherever I have my package declared, it gives an error.

** Error: (vcom-11) Could not find work.mainpkg.
** Error: D:/altera/10.0/alex_thesis/cntblock.vhd(16): (vcom-1195) Cannot find expanded name "work.mainpkg".
** Error: D:/altera/10.0/alex_thesis/cntblock.vhd(16): Unknown expanded name.
** Error: D:/altera/10.0/alex_thesis/cntblock.vhd(18): VHDL Compiler exiting

I declare it the following way:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.mainPkg.all;

Quartus II compiles the project with no problems, so why doesn't ModelSim do it, too? The worst part is that it used to compile, but suddenly it stopped.

Thanks in advance,

Alex

Altera_Forum · ‎09-06-2011

have you compiled the mainPkg before this design file?

have you compiled the other enities before this file?

Compile order is important.

Altera_Forum · ‎09-07-2011

It turned out I had a catch-22 going on, because my mainPkg was in the file where the main entity was. But the main entity wouldn't compile because it had references to the other entities that wouldn't compile because they had references to the mainPkg.

I fixed it now. Thanks :)