Quartus Testbench - Modelsim - Problems

[Altera_Forum]

Hi there, 

at first let me say, that i`m new to vhdl, so sorry for "stupid" questions.  I use QuartusII web edition and ModelSim starter edition.   I got a schematic design, i want to simulate in a testbench.  I already get some support by an other user and also read all the tutorials an PDF`s, but i still got problems.  I want to let quartus automatically design a testbench.   These are my steps: 1.) built a compileable schematic 2.) export this schematic as .vhd 3.) add the vhd to the project and set the .vhd it as top level entity, remove the .bdf file from project 4.) compile the .vhd file 5.) start testbench template writer 6.) define in settings my tesbench .vht file 7.) compile the design again 8.) RTL simulation ----> ModelSim starts and automatically tries to import the files. But i receive an error like: "Could not find '...simulation/modelsim/rtl_work.xxxxxxx_tst'."  Thats the first problem. So is the procedure above right or are there missing steps?   So, i tried to simulate it manually. So i opened ModelSim and right click "simulate" on the .vht testbench file. I could import the waves and also generate a clock. But on the outputs, there are "wrong" signal values. When i do the same thing and simulate it with the Waveform Editor, everything worked as mentioned. And how to save a simulation enviroment, when once created it manually?  So i would be happy, if somebody could help me to fix that. Thank you in advance.  Best regards