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Synthesization of design in Quartus II using Precision RTL Synthesis

Altera_Forum
Honored Contributor II
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Hello, 

 

I'm synthesizing my to-level-design also known as zpu_core.bdf. The strange thing is, the error appeared like this: 

 

Error: Precision Error:# Error: Design zpu_core not found in HDL files. 

 

I really don't have any idea why it was trying to find my design in HDL files. 

 

Solution?
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Altera_Forum
Honored Contributor II
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Tools other than Altera Quartus II, do not read/understand the bdf files. Hence you will not be able to synthesize them in Precision. Try Quartus II synthesis and it should work.

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Altera_Forum
Honored Contributor II
470 Views

 

--- Quote Start ---  

Hello, 

 

I'm synthesizing my to-level-design also known as zpu_core.bdf. The strange thing is, the error appeared like this: 

 

Error: Precision Error:# Error: Design zpu_core not found in HDL files. 

 

I really don't have any idea why it was trying to find my design in HDL files. 

 

Solution? 

--- Quote End ---  

 

Export .bdf file as HDL file and use this HDL file in Precision RTL.
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Altera_Forum
Honored Contributor II
470 Views

Hello, 

 

To Miserten, i have to use precision because the bdf file contains two block which each of them has vhdl codes.The vhdl files have problem when i synthesize with Quartus Synthesis. 

 

To vizzie, how to export this .bdf file as HDL file?? This bdf file has two block which have vhdl codes. 

Hope to see from you soon. 

 

Regards, 

Bruno Kasimin
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Altera_Forum
Honored Contributor II
470 Views

Open BDF file in Quartus, then go to File menu and do export.

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Altera_Forum
Honored Contributor II
470 Views

 

--- Quote Start ---  

Hello, 

 

To vizzie, how to export this .bdf file as HDL file?? This bdf file has two block which have vhdl codes. 

Hope to see from you soon. 

 

Regards, 

Bruno Kasimin 

--- Quote End ---  

 

 

File -> Export is the obvious option. But in case you are unable to export the entire schematic (which I don't see why it cannot happen), export each of the blocks and then simply write the top-level entity in HDL joining these two blocks the way they are connected in the schematic. This doesn't need any great HDL coding, you will only have to join the ports correctly. Export has some issues, so make sure you 'Update' your designs if you make any changes in bdf.
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Altera_Forum
Honored Contributor II
470 Views

hope it does work.another error coming out.but precision has found my design.Still trying to correct the error

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Altera_Forum
Honored Contributor II
470 Views

file-> update -> create hdl design file for the current file..simpler i think..with export, export window appear and asked me to save as .to save it as .jpg or .bmp format..

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