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Why Time Quest "derive_pll_clocks" does not extend all base clock requirements?

Altera_Forum
Honored Contributor II
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Hi, 

myproject sdc file looks like this: 

# ============================================================= 

create_clock -name {clk75m} -period 13.333 -waveform { 6.666 13.333 } [get_ports {CLK1}] 

 

create_clock -name {clk59m125} -period 16.912 -waveform { 8.456 16.912 } [get_ports {CLK2}] 

 

derive_pll_clocks -create_base_clocks -use_net_name# (IMPORTANT! Input clock to the PLL is ONLY CLK1) 

 

set_clock_groups -asynchronous  

-group [get_clocks {clk75m}]  

-group [get_clocks {clk59m125}]# ============================================================== 

 

Time Quest reports setup violations in which the launching clock is CLK2 and the latching clock is 

PLL's output clock (derived from CLK1). 

Why TimeQuest disregards the set_clock_groups -asynchronous on a derived clock?
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