Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12606 Discussions

Custom Instruction Tutorial-leading zero detection

Altera_Forum
Honored Contributor II
‎06-02-2006 12:25 AM
888 Views

Hi, I am trying to do Custom Instruction Tutorial-leading zero detection.. 

I am using UP3 education board, and QuartusII software doesn't provide files like other board. 

So I choosed the Cyclone EP1C12~~ 

So I chosed the Cyclone EP1C12~~folder and copied it and rename the directory. 

and start to do mapping to current device EP1C6Q240C8 

 

For that I've changed device, and Sram component, and regenerate, pin assign, recompile... 

After modifying some stuff, finally I was able to compile it.  

But when I actually, run the application, it gave me below: 

 

Verify failed Leaving target processor paused 

 

And I can't think anything I could missed.  

Does anyone knows what the above error means? And which kind problem cause this... 

If possible, anyone has done the same work( 'Custom Instruction Tutorial-leading zero detection' with UP3 board (EP1C6Q240C8)) . Please, help me.... 

 

Thanks. 

 

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/unsure.gif
0 Kudos

Link Copied

0 Replies
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.