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NIOSII RST pin

Altera_Forum
Honored Contributor II
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Dear guys, 

 

I would like to implement a reset of NIOS II processor by software. So I have 

included by SOPC builder a simple output PIO which is directly connected to the 

processor RST pin. 

 

When I drive this PIO with a LOW state of 20 us (and I'm sure I drive it because I can  

show it on a scope) I expect NIOS II makes a reset. But it doesn't happen !!!  

 

Any ideas ? 

 

Best Regards 

 

/Alessandro Strazzero
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5 Replies
Altera_Forum
Honored Contributor II
314 Views

If you just want a software reset then 

 

1. disable all IRQs (if you use any) 

 

2. use 

 

goto *((void**) NIOS2_RESET_ADDR); 

 

to jump to the reset address of the NIOS. 

 

NIOS2_RESET_ADDR is defined at system.h, so don't forget to  

# include <system.h> 

 

This will ONLY reset the CPU, NO reset for any of the peripherals !! 

 

Hope this helps, 

Klaus
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Altera_Forum
Honored Contributor II
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How can I reset my processor from inside the VHDL code without it resetting all peripherals ? 

 

I have a top entity VHDL which has an instance of the Nios II system (which was generated by SOPC builder), connected to various custom VHDL modules. I want the VHDL to supervise processor operation and restart it in case anything goes wrong. How can this be achieved ?
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Altera_Forum
Honored Contributor II
314 Views

 

--- Quote Start ---  

originally posted by eliben@Sep 6 2006, 06:05 AM 

how can i reset my processor from inside the vhdl code without it resetting all peripherals ? 

 

i have a top entity vhdl which has an instance of the nios ii system (which was generated by sopc builder), connected to various custom vhdl modules. i want the vhdl to supervise processor operation and restart it in case anything goes wrong. how can this be achieved ? 

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=18094) 

--- quote end ---  

 

--- Quote End ---  

 

 

 

I think Nios V6.0 provides a separate CPU reset signal...
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Altera_Forum
Honored Contributor II
314 Views

 

--- Quote Start ---  

originally posted by stonie+sep 6 2006, 04:35 am--><div class='quotetop'>quote (stonie @ sep 6 2006, 04:35 am)</div> 

--- quote start ---  

<!--quotebegin-eliben@Sep 6 2006, 06:05 AM 

how can i reset my processor from inside the vhdl code without it resetting all peripherals ? 

 

i have a top entity vhdl which has an instance of the nios ii system (which was generated by sopc builder), connected to various custom vhdl modules. i want the vhdl to supervise processor operation and restart it in case anything goes wrong. how can this be achieved ? 

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=18094) 

--- quote end ---  

 

--- Quote End ---  

 

 

 

I think Nios V6.0 provides a separate CPU reset signal... 

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=18102)</div> 

[/b] 

--- Quote End ---  

 

 

Thanks. Is there a way, however, to do it in Nios 5 ? It doesn&#39;t have to be an "officially supported way".
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Altera_Forum
Honored Contributor II
314 Views

Hi Eliben, 

 

We have applications that sometimes need to restart the CPU. Stonie&#39;s method of killing the IRQs and jumping to the reset address works ok for us on version 5.0 

but I would like to add a little to what he says. As well as disabling the global IRQ it is best to disable all the individual IRQs on the peripherals too. I think Stonie meant this but didn&#39;t make it quite clear. This ensures that when the system wakes up again there are no &#39;pending&#39; interrupts that get serviced before you&#39;re ready for them, or have even installed them. 

 

Banx.
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