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Hi,
Greetings and welcome to Intel's forum.
Unfortunately, Platform Designer does not attempt to align separate memory components in a contiguous memory range. For example, if you want multiple On-Chip Memory components addressable as one contiguous memory range, you must explicitly assign base addresses.
Also, may I know the reason you would like to have un-aligned 32-bit access to memory?
Here is the information on NIOS V handbook section 2.1.3. Specifying Base Addresses and Interrupt Request Priorities: https://www.intel.com/programmable/technical-pdfs/726952.pdf
Thank you.
Regards,
Kelly Jialin, GOH
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Hi,
Any updates from your end? Is there any further help needed to clear your doubts?
Thank you.
Regards,
Kelly
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Hi,
Any updates from your end?
Hope to hear on your feedback.
Thank you.
Regards,
Kelly
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Hi,
As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
Thank you.
Regards,
Kelly Jialin, GOH
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