Dear all,
I'm evaluating a new design which will employ the EP2S60F672.
Two things I want to enquire:
1. Does this chip support the Serial Flash Loader programming scheme? I have use this scheme in Cyclone III successfully. Only one JTAG pins connector is OK for downloading the program into EPCS device. The active serial (AS) programming interface could be removed.
I have got some info in the website that Stratix II series support this scheme, however, there is no evidence shows the Stratix II support this scheme according to the handbook of Stratix II. So I am seeking some others to help me confirm with this.
2. The other thing I want to enquire is about the Thermal Management of the FPGA. I have read the application notes "Thermal Management for FPGAs". But I still can not make the decision whether it's need to add additional heat sink in my board. As my current simulation, 40% resource is using in the FPGA. EP2S60F672I4 could be chosen if the temperature is critical. Otherwise, EP2S60F672C4 or EP2S60F672C5 is preferred since the price is lower.
I'm appreciated if expert could give some suggestions about my issues.
Thanks
Best regards,
Derek
