Cannot generate pcie avmm example design

[allen18]

Using Quartus Prime Pro 22.3. During the file generation process, it first creates the example design in the temporary folder on the C drive. However, in the final step, I encounter an issue where a file cannot be added: C:\Users\windows\AppData\Local\Temp\alt9605_128249265337967079.dir\0004_pcie_s10_hip_avmm_bridge_0_gen\ip\pcie_ed\pcie_ed_jtag_to_master_avalon_bridge\altera_jtag_avalon_master_191\sim\pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v\pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v.

I find it strange that it consists of two identical '.v' filenames with an "\", which doesn't seem to be reasonable. During the creation of the example design, I was able to locate this file, but its name is pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v, rather than the one mentioned in the error message pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v\pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v."

L-tile and H-tile Avalon® Memory mapped Intel  FPGA IP for PCI Express

configuration is PCIE gen3X4 

native endpoint

enable avmm DMA 

example design environment ：system  

select design : DMA 

then generate , the error will occur

Error: add_fileset_file: No such file C:/Users/windows/AppData/Local/Temp/alt9605_128249265337967079.dir/0004_pcie_s10_hip_avmm_bridge_0_gen/ip/pcie_ed/pcie_ed_jtag_to_master_avalon_bridge/altera_jtag_avalon_master_191/sim/pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v/pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v
while executing
"add_fileset_file $relative_item [ ::altera_pcie_s10_hip_avmm_bridge::fileset::filetype $absolute_path ] PATH $absolute_path"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $top_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::add_files_recurs..." line 7)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::add_files_recursive [ pwd ]"
(procedure "::altera_pcie_s10_hip_avmm_bridge::generate_design_example_f..." line 63)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::generate_design_example_files ${QSYSTemPath} ${QSYSTemName}"
(procedure "::altera_pcie_s10_hip_avmm_bridge::generate_dynamic_qsys" line 671)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::generate_dynamic_qsys"
(procedure "::altera_pcie_s10_hip_avmm_bridge::dynamic_example_design" line 97)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::dynamic_example_design"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::callback_example..." line 2)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::callback_example_design pcie_s10_hip_avmm_bridge_0_example_design"

[wchiah]

Hi,

You should click the "Reply" before you can post the "Post Reply"

Can you please provide me the device OPN ? I will try to replicate this on my place and see if I can see the same error as yours or not.

Regards,

Wincent_Intel

[allen18]

I use stratix 10 - 1SX110HN2F43I2VG

[allen18]

Hi, wchiah

I'm sorry, my computer browser had some issues earlier,The device I am using is Stratix 10-1SX110HN2F43I2VG

[wchiah]

Hi,

I follow your .ip configuration, I am able to generate the design example using Quartus v22.3

I have attached the .qar file to you for reference. 

Regards,

Wincent_Intel

[allen18]

Thank you very much. I have indeed tried multiple times but failed to generate it. I searched for the reason and it could be due to the Maximum Path Length Limitation. Does your Windows have a limitation of MAX_PATH = 260?

[wchiah]

Hi Allen,

You may look at the solution as below

https://www.intel.com/content/www/us/en/support/programmable/articles/000087662.html

Regards,

Wincent_Intel

[wchiah]

Yes, you are right This issue is possible caused by filename length limitation of Windows OS. You can generate the example design with Linux OS, which can be used on Windows OS as well. Or you can try with the following workaround on Windows OS. Thanks.
https://docs.microsoft.com/zh-cn/windows/win32/fileio/maximum-file-path-limitation?tabs=cmd

[allen18]

Can you please try enabling this limitation and see if it produces the same error as mine?  since my computer is owned by the company, I am unable to modify certain configurations.

[wchiah · Accepted solution]

Hi Allen,

that is limitation of Window OS,
As previous reply, you can try to generate the example design in Linux OS and use it in Windows OS.

Let me know if there is anything else I can help you.

Regards,

Wincent_Intel

[wchiah]

Hi Allen,

Thanks for confirming the answer, glad that I am able to help you.

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If your support experience falls below a 9 out of 10, I kindly request the opportunity to rectify it before concluding our interaction. If the issue cannot be resolved, please inform me of the cause so that I can learn from it and strive to enhance the quality of future service experiences. 

Regards,

Wincent_Intel