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Hello every body;
I have finished my design on alter stratix III chipe, the optimization results obtained from Quartus have Combinational Luts and Memory Luts. I want to compare my design with another one based on xilinx-vertix5, which show his results in xilinx slices, how can i found a comon measures of the two designs Thanks.Link Copied
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Usually, the resource usage should be fairly comparable. But it will be difficult to compare, as I think Stratix 3 uses 4 input LUT and virtex is 6 (IIRC)?
But it is much better and more useful to compare these things: - memory and DSP usage - FMax - Cost.
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