Help:Unable to generate Qsys synthesis files after version upgrade

[Altera_Forum]

Currently I am trying to edit/modify the sv_GT_4ch_128b_28000mbps example however it auto upgraded to 13.1 from version 12.0 and I am stuck to errors such as: 

 Error: System.mgmt_clk.clk_reset/data_pattern_generator_0.csr_clk_reset: Missing connection end (try "Remove Dangling Connections") Error: System.mgmt_clk.clk_reset/data_pattern_checker_0.csr_clk_reset: Missing connection end (try "Remove Dangling Connections") Error: System.mgmt_clk.clk_reset/data_pattern_generator_1.csr_clk_reset: Missing connection end (try "Remove Dangling Connections") Error: System.mgmt_clk.clk_reset/data_pattern_checker_1.csr_clk_reset: Missing connection end (try "Remove Dangling Connections") Error: System.mgmt_clk.clk_reset/data_pattern_generator_2.csr_clk_reset: Missing connection end (try "Remove Dangling Connections") Error: System.mgmt_clk.clk_reset/data_pattern_checker_2.csr_clk_reset: Missing connection end (try "Remove Dangling Connections") Error: System.mgmt_clk.clk_reset/data_pattern_generator_3.csr_clk_reset: Missing connection end (try "Remove Dangling Connections") Error: System.mgmt_clk.clk_reset/data_pattern_checker_3.csr_clk_reset: Missing connection end (try "Remove Dangling Connections") Error: System.timing_adapter_0: timing_adapter_0.out and xcvr_low_latency_phy_0.tx_parallel_data0 must be on the same clock domain, since they're connected. Error: System.timing_adapter_2: timing_adapter_2.out and xcvr_low_latency_phy_1.tx_parallel_data0 must be on the same clock domain, since they're connected. Error: System.timing_adapter_4: timing_adapter_4.out and xcvr_low_latency_phy_2.tx_parallel_data0 must be on the same clock domain, since they're connected. Error: System.timing_adapter_6: timing_adapter_6.out and xcvr_low_latency_phy_3.tx_parallel_data0 must be on the same clock domain, since they're connected.     Warning: System.xcvr_low_latency_phy_0.tx_parallel_data0: Interface must have an associated reset Warning: System.xcvr_low_latency_phy_0.rx_parallel_data0: Interface must have an associated reset Warning: System.xcvr_low_latency_phy_1.tx_parallel_data0: Interface must have an associated reset Warning: System.xcvr_low_latency_phy_1.rx_parallel_data0: Interface must have an associated reset Warning: System.xcvr_low_latency_phy_2.tx_parallel_data0: Interface must have an associated reset Warning: System.xcvr_low_latency_phy_2.rx_parallel_data0: Interface must have an associated reset Warning: System.xcvr_low_latency_phy_3.tx_parallel_data0: Interface must have an associated reset Warning: System.xcvr_low_latency_phy_3.rx_parallel_data0: Interface must have an associated reset Warning: System.xcvr_low_latency_phy_0.tx_parallel_data0: xcvr_low_latency_phy_0.tx_parallel_data0 does not have an associated reset Warning: System.xcvr_low_latency_phy_0.rx_parallel_data0: xcvr_low_latency_phy_0.rx_parallel_data0 does not have an associated reset Warning: System.xcvr_low_latency_phy_1.tx_parallel_data0: xcvr_low_latency_phy_1.tx_parallel_data0 does not have an associated reset Warning: System.xcvr_low_latency_phy_1.rx_parallel_data0: xcvr_low_latency_phy_1.rx_parallel_data0 does not have an associated reset Warning: System.xcvr_low_latency_phy_2.tx_parallel_data0: xcvr_low_latency_phy_2.tx_parallel_data0 does not have an associated reset Warning: System.xcvr_low_latency_phy_2.rx_parallel_data0: xcvr_low_latency_phy_2.rx_parallel_data0 does not have an associated reset Warning: System.xcvr_low_latency_phy_3.tx_parallel_data0: xcvr_low_latency_phy_3.tx_parallel_data0 does not have an associated reset Warning: System.xcvr_low_latency_phy_3.rx_parallel_data0: xcvr_low_latency_phy_3.rx_parallel_data0 does not have an associated reset Warning: System.mgmt_clk: mgmt_clk.clk_in_reset cannot be both connected and exported Warning: System.ref_clk_0: ref_clk_0.clk_in_reset cannot be both connected and exported Warning: System.ref_clk_1: ref_clk_1.clk_in_reset cannot be both connected and exported Warning: System.ref_clk_2: ref_clk_2.clk_in_reset cannot be both connected and exported Warning: System.ref_clk_3: ref_clk_3.clk_in_reset cannot be both connected and exported  Help is much appreciated :(:(