Hello all,
I want to use channel 1 and channel 4 of cyclon v gx (6 - xcvrs fpga) for different protocols with seperate sets of clocks( for tx pll and channel cdr) for two channels.i.e. for channel 1, I am using dedicated refclk(refclk0) provided for that particular channel for txpll and neighbouring channel's ( channel 0) dual rx/refclk pin for channel cdr.
and same thing for channel 4 in different bank. but, then it gives fitting error "Illegal constraints of channel pll to the region (0,13) to (0,33) ". when I am using only dedicated refclk for my both channel, it works. plz help me out as i want complete seperate sets of clocks for two channels
