Input I/O to ARRIA V GX PLL

[Altera_Forum]

Hello, 

I have a 100Mhz clock input to ARRIA-V GX device. this clock input connected to the negative input clock I/O - CLK0N_AP31/DIFFIO_RX_B2N.  This clock is driven to a PLL (integer PLL). Is it posible to connect PLL input to a negative input clock (CLK0N_AP31/DIFFIO_RX_B2N)??????   When I compile the project I am getting this ERROR:  Error (175001): Could not place fractional PLL  Info (175028): The fractional PLL name: check_clk2pll_0002:check_clk2pll_inst|altera_pll:altera_pll_i|general[0].gpll~FRACTIONAL_PLL  Error (177020): The PLL reference clock was not placed in a dedicated input pin that can reach the fractional PLL.  Attached a test case (a CLK0N_AP31 I/O connected to a PLL )  THANKS   

[Altera_Forum]

you may search for rd03302012_430.

[Altera_Forum]

Or you can try connecting the clock input to CLK#p (positive clock) which has dedicated routing path to the PLL.