Jtag problem of cycloneIII QuartusII 7.2

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Jtag problem of cycloneIII QuartusII 7.2

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I've spent 4 days debugging the jtag circuit. And QII 7.2 still yield "Error: CONF_DONE pin failed to go high in device 1" as the programmig goes to 92% in JTAG mode.

today I tried QII 8.1 to see if there is any luck......and surprisingly, I successfully programmed the sof to the board. The logic is running fine.

it took me 4 days to search and debug, and the solution is just switching QII 7.2 to QII 8.1? I can't explain this, but noting seems to be wrong till now.

But i really want to figure out why, and I still want to use QII7.2 as I've to use some old ip cores.

thanks for any help.

oh, i am using EP3C40F780C6N/EPCS16/ByteblasterII.

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