Startup problems web edition

[Altera_Forum]

I downloaded and installed web edition . Tried to run first tutorial and advised that the Cyclone II was not installed. Downloaded Cyclone II files and then each time I try and install -> tools -> Install devices I get error message " Cant find web edetion devices in directory " this is in spite of the .qdz file being in the target directory. 

 Any advice appreciated .

[Altera_Forum]

What version?  

 Cyclone II needs version 13.0 SP1 or earlier.  Pete

[Altera_Forum]

--- Quote Start ---  What version?   Cyclone II needs version 13.0 SP1 or earlier.  Pete  --- Quote End ---    Thanks - As a new user does this mean that I should try and load the tutorials onto a larger device eg Cyclone 3. We normally design using PCB and ARM processors using the Big / Little NXP devices or higher end PIC's . I still don't get the technical or commercial benefit of using an FPGA so just wanted to investigate and hopefully the benefits will become clear . The first five minutes resulted in this situation so I am sure that the road is long and possibly full of gotchas ? Do you know if there is a list of successful implementations with some idea of development time and commercial justification for FPGA selection .   Thanks again for your prompt response.

[Altera_Forum]

--- Quote Start ---  Do you know if there is a list of successful implementations with some idea of development time and commercial justification for FPGA selection.  --- Quote End ---    This question is impossible to answer without some description of the requirements.  For example, if your requirements can be met using a processor, then the answer might be that you would not even use an FPGA :)  The length of development time is highly dependent on the developer's experience with FPGAs (you, or your co-worker, or subcontractor), and whether the design can be implemented using standard IP, or whether you have to design and verify a lot of custom IP.   If you describe what your requirements are, I'm sure you will get suggestions for possible implementations. I'd recommend starting a new thread though, since the title of this thread would not result in many people reading it (with regards to discussion of your project requirements).  Cheers, Dave

[Altera_Forum]

The key motivator is to mitigate the risk of end of life of off the shelf components when in theory our design could be ported to different chips and be adjusted as standards evolve . We would be looking to mixed signal specifically in the rfid space where there is a need to support legacy and newer technologies with ever increasing security needs between the token and back end . I realize the broad question but was throwing out a generality to get a feel . Eg 30.000 gate design 8 months , unit price 25 us. Often we have jumped in and find that 40 % of engineering time is on keeping abreast of the tools and devices as the rate of change results in permanent loss of traction due to new design bedding down and just when stable all the factors of design freeze have moved and we begin again . I get the feeling that the fpga route is for companies that don't have the resources or market volumes for ASIC , so perhaps key decision is if volumes were high enough could we justify an ASIC and if yes the do first iteration on fpga.

[Altera_Forum]

On the Cyclone II versioning issue, I feel your pain.. There's a few threads on that: 

http://www.alteraforum.com/forum/showthread.php?t=43127&goto=newpost  Some projects we have used FPGA's for:  Wide band multi-channel software defined radios: Receiving both OOK/FSK data formats across 128 channels simultaneously.   High data rate sampling system, with large DSP requirements. Takes samples at 102.4 MHz, and process the data at the sample rate.  Custom logic video image system that requires custom video processing and system control at frame rates.  A system with a Large IO requirement that requires realtime updates.  ASIC Development platform. If you want to make a low cost custom chip, you have to spend big money up front. FPGA's are used to make sure your logic works before you spend the $million mask costs..  You can pretty much do anything with an FPGA, if you can't keep up with the processing, an FPGA is great, for offloading the CPU. How long it takes, really depends on your requirements.  Pete

[Altera_Forum]

--- Quote Start ---  The key motivator is to mitigate the risk of end of life of off the shelf components   --- Quote End ---   This would depend on "where" your intellectual property exists, i.e., is your secret sauce in the hardware design or in what the software does.  For example, if your "secret sauce" is in software, and that software is written for an ARM microcontroller, then at a minimum you might need to port your code from ARM7 to Cortex series devices, but there would be no reason to go to an FPGA or SoC FPGA. There are numerous vendors that support the ARM processor architecture, so as long as you are not using exotic interfaces specific to a particular vendor, you have few end-of-life issues.    --- Quote Start ---   We would be looking to mixed signal specifically in the rfid space where there is a need to support legacy and newer technologies with ever increasing security needs between the token and back end.  --- Quote End ---   I would assume low-power would be a requirement in this situation. FPGAs are not likely to be the best solution.    --- Quote Start ---   I realize the broad question but was throwing out a generality to get a feel . Eg 30.000 gate design 8 months, unit price 25 us.   --- Quote End ---   The design time depends on the team and the task, its impossible to estimate. The unit cost is the unit cost of the FPGA plus its configuration device. You can find that information now.    --- Quote Start ---   Often we have jumped in and find that 40 % of engineering time is on keeping abreast of the tools and devices as the rate of change results in permanent loss of traction due to new design bedding down and just when stable all the factors of design freeze have moved and we begin again.   --- Quote End ---   This is highly dependent on the resources you use. If you have to use Altera's IP, and that IP changes for each device, then yes, you have to keep abreast of the tools and devices. However, there are plenty of development kits, so as long as you are prepared to invest in the kits, and provide them to your engineers to "play with", they will be familiar with the different device architectures and IP requirements before you use the devices in a product. There is definitely a non-zero cost associated with changing devices though.    --- Quote Start ---   I get the feeling that the fpga route is for companies that don't have the resources or market volumes for ASIC , so perhaps key decision is if volumes were high enough could we justify an ASIC and if yes the do first iteration on fpga.  --- Quote End ---   FPGAs are definitely a good vehicle for designing new IP. However, FPGA and ASIC flows are not identical, eg., in an ASIC if you want a particular RAM block, then you can use it, and use it as many times as you want. In an FPGA, you have a fixed set of resources, and so you may have to make some FPGA-specific design decisions. Regardless of this limitation, they reduce the development risk, but they "cost" in that your developer now has to be familiar with an ASIC flow and FPGAs (and FPGA-vendor specific devices and IP).  Cheers, Dave