Timing - Intel Community

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Timing

290 Views

Respected Sir,

Since i am giving the inputs for Analog to digital converter, I am getting issues which i marked in circle, In that i got unwanted pulse signal, which is not expected. Please help me regarding this. I attached the image

Regards

T.S.Saravana Kumar

109 KB

Link Copied

1 Reply

274 Views

Hi,

May I know which ip you're tested on?

Thanks,

Sheng

Copy link

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.