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Hello.
According to the virtual JTAG Megafunction guide the "Hub IP configuration register" contains the following values: Bits 7-0: SUM(m,n) Bits 18-8: ALTERA_MFG_ID = 0×6E Bits 26-19: N Bits 31-27: version However in my tests (using Quartus II 11.0 and the Cyclone II evaluation board) Bits 7-0 seem to contain the number "m" only, not "m+n". In the current project the virtual IR register (User1) is 13 bytes long (n=3, m=10) and bits 7-0 of the configuration register contain the number 10, not 13 as expected. I also tried (n=1, m=4) and (n=1, m=5); the configuration register values were 4 and 5, not 5 and 6 as expected. Is this - A bug in the virtual JTAG Hub or - a bug in the documentation or - do I do anything wrong?? Thanks. MartinLink Copied
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--- Quote Start --- However in my tests (using Quartus II 11.0 and the Cyclone II evaluation board) Bits 7-0 seem to contain the number "m" only, not "m+n". --- Quote End --- The documentation is wrong. Here's my analysis http://www.ovro.caltech.edu/~dwh/correlator/pdf/vjtag.pdf Cheers, Dave
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Hey Dave,
I have been struggling issuing the VIR HUB_INFO instruction and then shifting out the resulting data. How to target the SLD_hub in that case? Thanks.- Mark as New
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--- Quote Start --- I have been struggling issuing the VIR HUB_INFO instruction and then shifting out the resulting data. How to target the SLD_hub in that case? --- Quote End --- Download the zip file for this tutorial: http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial There's a Tcl script in there for use with Quartus stp. It has all the hub interrogation code, eg., print_hub_info and print_node_info. Read that code, it'll show you how it all works. Cheers, Dave
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Hats off to you Sir, That bit of information was what I was missing in my logic
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--- Quote Start --- Hats off to you Sir, That bit of information was what I was missing in my logic --- Quote End --- You're welcome! Cheers, Dave
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