Hi,
I have a board including Altera Cyclone III, DDR, EPCS4..
I'm trying to program the flash (EPCS4) without DDR at this step, by module of a ram on the FPGA.
I'm burning my *.jic file, then my application from the "flash programmer" of Nios II IDE 10.1, turn the power off then on and my application (simple Flickering) run :)
if I change my application to flicker another way then build and programm the flash again, turning off then on makes the first application run and not the updated one!
just if I compile the related fpga configuration with Quartus II 10.1 (a lot of time) and making new *.jic file and burning it again, then the apdated application run correctly ?
anybody can explain what is going here?! how could the EPCS contain two different app and how to update my app without burning new *.jic every time I make small update?!
thanks and have a great week :)
