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Hello,
Sometimes in simulation, I add some pins to the top level entity, but then I will not use them. What happen with the unassigned pins of the top level entity? Are they connected to some output pin of the FPGA?. Thank youLink Copied
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--- Quote Start --- Are they connected to some output pin of the FPGA?. --- Quote End --- Yes, if you define output ports. The pin list can tell.
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