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20707 Discussions

Unassigned pins of top level entity

Altera_Forum
Honored Contributor II
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Hello, 

 

Sometimes in simulation, I add some pins to the top level entity, but then I will not use them. 

 

What happen with the unassigned pins of the top level entity? Are they connected to some output pin of the FPGA?. 

 

 

Thank you
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Altera_Forum
Honored Contributor II
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Are they connected to some output pin of the FPGA?. 

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Yes, if you define output ports. The pin list can tell.
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