MAX II CPLD reconfiguration

[Altera_Forum]

Is it possible to laod a new CPLD image in a MAX II device without a power cycle? If so how are the IO and state bits saved?

[Altera_Forum]

MAX II allows you to load a new design into the device while the existing design is functioning normally. Power cycle will cause the new design to start operation. You can also use JTAG instructions to force the new design to start functioning, instead of power cycling the device. App Note 410 has some detailed info on this. 

http://www.altera.com/literature/an/an410.pdf  Hope this helps.

[Altera_Forum]

But the MAXII configuration flash and USER flash can be WRITE 100 times,this is the KEY!

[Altera_Forum]

Sure, but think about it -- how many times are you going to upload a brand new image to your CPLD? If you are changing your bitstream more than 100 times, I'd question how much verification work you are doing...  

 UFM is a different story.