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DCFIFO Not Working

Altera_Forum
Honored Contributor II
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I have implemented a dual clock domain fifo using the mega function wizard. The write clock is 8bit 10Mhz and the read clock is 64 bit 125Mhz. The problem I am having is that I am clocking in constant data but my read path is reading all zeros. Is there a problem with the DCFIFO?  

 

Trampas
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Altera_Forum
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Never mind, I figured out the bug. I had a typo in the rdreq name and the compilerr automagically created a wire for it...  

 

One day I will figure out how to turn off some of the 700 warnings that the compiler gives me, such that the warnings are useful.  

 

Trampas
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Altera_Forum
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One day I will figure out how to turn off some of the 700 warnings that the compiler gives me, such that the warnings are useful. 

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Sometimes there are many warnings you don't care about after an initial warning that matters caused by an user mistake or code bug. Other than that case, you should check all warnings. Some Info messages also have very important information. 

 

Once you're satisfied that a particular warning or a particular class of warnings does not matter, you can hide that warning or similar warnings by right clicking the message and choosing "Suppress". For subsequent compilations, the messages won't be cluttered by the messages you've already reviewed. The suppressed messages are still available in case you do want to see them again. 

 

You can also control the number of synthesis messages given using "HDL Message Level" on the Analysis & Synthesis Settings page of the Settings dialog box.
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Altera_Forum
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Once you're satisfied that a particular warning or a particular class of warnings does not matter, you can hide that warning or similar warnings by right clicking the message and choosing "Suppress". 

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The amount of warnings that you get in a typical compilation is almost unbearable. The supress manager helps a bit, but it is not a real solution. What you usually would want to supress is not a specific type of warning, but specific occurences of the warning. 

 

Quartus can also hide warning at the module level, but it is not good enough. What I would like is an attribute to specify something like "don't warn me about this specific signal being stuck at GND", but keep warning me about other signals.
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Altera_Forum
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What you usually would want to supress is not a specific type of warning, but specific occurences of the warning... What I would like is an attribute to specify something like "don't warn me about this specific signal being stuck at GND", but keep warning me about other signals. 

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The message suppression feature on the message right-click menu does support what I think you are saying. You can select "Suppress Exact Selected Messages" to suppress a specific occurrence. So you can suppress the message about the specific stuck-at-GND signal while still seeing the similar messages for other signals. 

 

 

 

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Quartus can also hide warning at the module level, but it is not good enough. What I would like is an attribute... 

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I'm guessing you are talking about the "altera message_off" synthesis directive. The documentation in the Quartus handbook sounds like that can be done only for modules, entities, and architectures. I was thinking you could suppress an individual message with a synthesis directive, but I guess module-level control is all you get when doing the suppression in the RTL.
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Altera_Forum
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The message suppression feature on the message right-click menu does support what I think you are saying. You can select "Suppress Exact Selected Messages" to suppress a specific occurrence. So you can suppress the message about the specific stuck-at-GND signal while still seeing the similar messages for other signals. 

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Honestly, I didn't know. I don't know why, but I assumed suppress manager was for a specific message type or class, and not for a specific occurrence. 

 

It is still not nearly as useful as if you could do that at the RTL source level. For starters, some warning messages are associated with a specific line number and nothing else. So as soon as the line moves, the suppression is not working anymore. Furthermore, it is dangerous because it might suppress a warning in a different line (that now moved to the position of the original one) than the one you wanted. It would actually say it is a bug that Quartus accepts those messages as "suppressible".
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Altera_Forum
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It is still not nearly as useful as if you could do that at the RTL source level. 

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I filed an enhancement request with Altera asking for something like the "altera message_off" synthesis directive that can suppress a particular message for a particular line of RTL. 

 

 

 

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For starters, some warning messages are associated with a specific line number and nothing else. So as soon as the line moves, the suppression is not working anymore. 

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I filed an enhancement request asking that the message-suppression feature available in the GUI be able to suppress messages that are exact except for line number. 

 

 

 

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Furthermore, it is dangerous because it might suppress a warning in a different line (that now moved to the position of the original one) than the one you wanted. It would actually say it is a bug that Quartus accepts those messages as "suppressible". 

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I mentioned this concern in my second enhancement request, but it might be that this problem could never happen. Would there ever be two messages from two different lines of source code that are completely identical (except the line number) without even a node name or entity name in the message text being different? Because Quartus includes the hierarchy in node and entity names, I think all messages containing such a name would have to be unique.
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Altera_Forum
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--- Quote Start ---  

I filed an enhancement request with Altera asking for something like the "altera message_off" synthesis directive that can suppress a particular message for a particular line of RTL. 

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You are my hero Brad :) 

 

 

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Would there ever be two messages from two different lines of source code that are completely identical (except the line number) without even a node name or entity name in the message text being different? 

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Yes, it might happen, because the problem is precisely that some warnings don't mention any node or entity name all. The only "variables" are the source file name and the line number: 

 

Warning (10273): Verilog HDL warning at filename.v(524): extended using "x" or "z" Warning (10958): SystemVerilog warning at filename.v(829): unique or priority keyword makes case statement complete
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Altera_Forum
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I added vjAlter's examples to my request with Altera.

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