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Hi
I am using Quartus web edition. I need a verilog Dram controller for a MT48LC32M8A2 SDRAM. This is not for a NOIS based project. Does ALtera provide this as a FREE Megafuction? Where else could I find such code.?Link Copied
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what is the efifo module in the verilog example used for? Looks like quite a bit of code just to control one SDRAM chip? (not that I know much about controlling these chips) :)
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There are two designs. I have been using the older VHDL one, as I mentioned in the discussion. But the SOPC builder component should also work, probably without the Avalon FIFO.
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Does SOPC builder work for free web edition? Is the IP free or does it create evaluation IP like the megafunctions that can only work while attached to Quartus environment?
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SOPC builder itself uses an Opencore evaluation, I think, but this doesn't affect components, e. g. the SDRAM controller.
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Tried SOPC builder - gives a warning the moment I set the data bits to 8. Also gives error and says that controller must be connected to an Avalon master???
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