Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20707 Discussions

Simulation NIOS II and VHDL block

Altera_Forum
Honored Contributor II
1,065 Views

Hi everybody, 

 

I have a problem to simulate 2 block on quartus together. 

In fact there is one NIOS II block and one VHDL block that i want to use in dual mode. So first during the simulation, is the NIOS block that command the system and then when i give a command,i want to switch to the VDHL block. 

So to do this i have created another VHDL bock that take as input all the output of the NIOS II block and the VHDL block, and implement a multiplex in output . 

There is no output when i do so, but when i test the two block separately, there is successfull result. 

 

Best regards
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
217 Views

Your post doesnt make sense. On the real hardware they would not run sequentially, they would run in parrallel all the time. 

Why not post the code you're having problem with?
0 Kudos
Altera_Forum
Honored Contributor II
217 Views

Hi Tricky 

i have attached you all my code and a picture of the different quartus block.So let see and tell me 

 

best regards
0 Kudos
Altera_Forum
Honored Contributor II
217 Views

Where are you seeing no output? Have you simulated the design? Have you simulated your wave_gen and dac_out together?

0 Kudos
Altera_Forum
Honored Contributor II
217 Views

 

--- Quote Start ---  

Where are you seeing no output? Have you simulated the design? Have you simulated your wave_gen and dac_out together? 

--- Quote End ---  

 

 

ihave simulate wave_gen alone; and the NIOS block alone. The output of the NIOS is visualized on the NIOS console and on the oscilloscope. the output of wave_gen is visualized in Quartus
0 Kudos
Reply