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Using Gigabit ethernet chip, do I need to ccontrol the data path length?

Altera_Forum
Honored Contributor II
‎02-23-2010 04:20 AM
1,181 Views

Hi, 

 

In one of our CIII board, we need to use 88E1111. 

My question is: do we need to make sure the length 

of all data line(TXD, RXD) are the same in order to  

achieve maximum data rate? How about control lines? 

 

Thanks and Best regards, 

 

Kevin
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Altera_Forum
Honored Contributor II
‎02-23-2010 05:43 AM
166 Views

"the same in order" sounds reasonable. Check the chip specification for tolerable delay skew with either GMII or RGMII interface and calculate the setup and hold margin depending on the FPGA side of the interface. I would expect, that a trace length difference up to 1-2" can be tolerated in most designs.

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Altera_Forum
Honored Contributor II
‎02-23-2010 06:16 AM
166 Views

you can consultant vendor.

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