How to enable the internal differential termination resistor?

[Altera_Forum]

Hello 

 I want to use the internal differential termination resistors in the stratix ii FPGA(EP2S60F1020C5) for LVDS receiving. The stratix ii handbook tells that these resistors can be set in the assignments editor in quartus ii software, but I don't know how. Can someone give me some suggestions or some tutorial?  Waiting for!

[Altera_Forum]

With V7.x Quartus software, the pin planner tool is the most comfortable way to enter and review pin location assignments, I/O standards, current strength and termination settings. You have to enable a column stratix ii termination in context menu Customize Colums and can activate differential termination for LVDS pins. 

 Alternatively, you can enter a new assignment name termination - stratix ii/..., value Differential, enabled yes for a pin or a pin group in Assignment Editor.

[Altera_Forum]

Would you please explain it concretely? I am a new user of quartus software, I just don't know how to "enable a column Stratix II Termination in context menu Customize Colums ", could you please give a step by step tutorial?

[Altera_Forum]

I suggest that you consult Quartus II handbook, where you can find all necessary information. If it's not understandable, ask Altera support. Unfortunately the handbook has 2718 pages,  

 Basically a context menu with any windows software is a menu, that opens on right mouse click within the specific context, here in Pin Planner. customize colums is the entry name that allows to add columns to the Pin Planner. You should try.  Also the operation assignment editor is straightforward, but Pin Planner is more comfortable.   I apologize that I don't have the time to give a detailed tutorial just now. May be other forum members have. I still hope that also short hints can help.  Best Regards Frank