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Hello all..
In my code(Model sim), if i select "Run All" then it goes infinite time.(Ie its not stopping at the end of my clock cycle but goes infinite loop and for seeing output i have to stop(Simulation -> break) it then and then only i can see out put. How can i stop it at the end of my code.. for exmaple.. architecture behav of FA_calc is ----- ----- if (clk = '1' and clk'event) then do something... ...... end if; end process; Sd : process(mydata) begin ----- ----- end if; end process Sd1; end behav; it should be stop at the end of end behv but its goes to infinite time.How to stop it at then edn of endbehav. Thanking you.Link Copied
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Are you using a test bench to simulate this code? After all of your code lines are executed, use $stop in your test bench to terminate the simulation.
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No..I am not using test benach but i got my solution..
http://www.velocityreviews.com/forums/t57165-how-to-stop-simulation-in-vhdl.html- Mark as New
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Even though you had to find it on your own, thanks for posting the solution. It's nice to see closure on these.
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