BE in SRAM in IDT controller of SOPC

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

BE in SRAM in IDT controller of SOPC

1,027 Views

Hi all,

I have designed a custom board on which I have permanently grounded BHE# and BLE# signals, so as to hard core it as 32 bit. Now, while using SRAM as program memory, I found it was not working (I used 1024 KB controller of IDT in SOPC). What could be the possible reason? Is it that there are some 16 or 8 bit instructions which have to executed, which I am missing as I have 32 bit memory?

Link Copied

0 Replies

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.