Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20707 Discussions

Using JTAG as General I/O

Altera_Forum
Honored Contributor II
‎07-31-2007 10:35 AM
1,300 Views

Hi, 

 

I'm using a MAX 7000S EPM7064S and need the JTAG pins to be used as general I/O pins once the device has been programmed. Does anyone have any ideas?
0 Kudos

Link Copied

3 Replies
Altera_Forum
Honored Contributor II
‎07-31-2007 05:45 PM
359 Views

Hello dth21, 

 

Sorry but JTAG programming pins are dedicated IO and can not be used as general purpose I/O (I believe this is true for all families). 

 

Regards, 

 

Chris
0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎08-07-2007 03:23 PM
359 Views

The following link may help you but only if you have not programmed the device via ISP(In System Programming) 

 

http://www.altera.com/support/kdb/solutions/1415.html
0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎08-07-2007 05:27 PM
359 Views

Thanks, wizard... 

 

"The force is strong with this one... " 

 

Apologies for the erroneous advice, dth21 

 

skids 

 

BTW: The tcl to allow JTAG pins for user IO is: 

set_global_assignment -name MAX7000_ENABLE_JTAG_BST_SUPPORT OFF
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.