Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Incircuit Programming Issues

Altera_Forum
Honored Contributor II
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Using Quartus II v. 9.1 SP1, and a USB blaster, Rev.C, I currently have  

two boards that experience the same issue. 

 

I can connect to the JTAG port on my design and successfully aquire the three CPLD's in the JTAG chain with the programmer, however, when I try to program the chain, I get the following error: Error: JTAG ID code specified in JEDEC STAPL Format File does not match any valid JTAG ID codes for device. 

 

 

One of these board actually has successfully been programmed several times before, but after changing one of the CPLD's has started this problem. 

 

I have other boards of this same design that program correctly every time. 

 

The three CPLD's in the Jtag chain are an EPM7032SL44-10, and two EPM7128SLC84's. 

All of these IC's have been purchased recently from Digi-Key. 

 

Any help would be appreciated 

 

Thanks 

 

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Altera_Forum
Honored Contributor II
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I think your jtag-chain might be messed up. 

try debugging it with quartus programmer > processing > jtag chain debugger. see if you can run the idcode instruction. 

 

adel
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Altera_Forum
Honored Contributor II
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I wonder, why you aren't using a *.pof file for programming?

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

I wonder, why you aren't using a *.pof file for programming? 

--- Quote End ---  

 

 

 

I am using .pof files in my programming chain.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

I think your jtag-chain might be messed up. 

try debugging it with quartus programmer > processing > jtag chain debugger. see if you can run the idcode instruction. 

 

adel 

--- Quote End ---  

 

 

 

I ran the ID code test on both boards for multiple seconds and both were  

"good and consistant". It found all three of my CPLD's on the board. 

 

cj
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