Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20707 Discussions

JTAG Debugger help / Cyclone III

Altera_Forum
Honored Contributor II
961 Views

I have problems with AS Configuration (using EPCS16) on my Cyclone III (speed/grade I7). 

The signals appear to be very clean but I see nSTATUS being driven low 4.38 usec after the end of the Fast Read memory transfer (NCSO going High) ... which suggests a probable CRC error. 

(I'll just mention briefly that reading the EPCS16 contents back to the PC, through the Blaster, or running configuration through JTAG using the Blaster, all work perfectly, in my setup.) 

 

Having exhausted just about every possibility and avenue, I want to try using my own CLKUSR during configuration, instead of the internal clock which causes DCLK to run at about 32 MHz. My CLKUSR would be 25MHz, so DCLK would be 12.5MHz. If I can shift in the EN_ACTIVE_CLK opcode, then according to the Cyclone III Handbook (Vol 1, Ch 9, page 9-65) the internal oscillator (driving the AS state machine) will be overridden by my clock. 

 

I tried, using Quartus II's JTAG Chain Debugger, to shift in the opcode for EN_ACTIVE_CLK which is (10 bits) 0x1EE (see Table 12-3 in Ch 12 of the Cyclone III Handbook, Vol 1). I assume I can use the Command "Scan Instruction Register", enter my desired# of clocks (10) and the correct opcode in TDI ... but it feels like I'm missing something, I don't think it's that simple. And it didn't work when I tried it. 

 

I know that the C-III's nCONFIG pin must be externally held Low, when I do this kind of JTAG operation. 

 

Can anyone advise me whether I should be able to shift in an EN_ACTIVE_CLK opcode, in a pretty easy manner, using the JTAG Chain Debugger in Quartus II? Is there any kind of documented procedure for how to do this using the GUI, or do I need another piece of software? Should this approach work, for what I want to accomplish? 

 

Thanks for your help ... Larry.
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
264 Views

I decided that I needed to use JTAG on the unconfigured Cyclone III, and probably to issue not just that one instruction, but possibly several others. 

 

Fortunately I resolved my AS configuration issue, and I don't need to mess with the boundary scan opcodes this time. But, a need could arise sometime in the future. 

 

I think I've located a resource, that will show me more about how to use boundary scan. On the Altera website -- 

debugging jtag chain integrity (odjtag1110)  

 

(a 1/2 hour online course; free) 

http://www.altera.com/education/training/courses/odjtag1110 

 

Larry
0 Kudos
Reply