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Hello, I had created code that counted from 1 to F in hexadecimal depending on the number of pushes on key. But now I need to modify the code to count from 1 to 9 every second and display it on the 7 segment decoder. I am not really sure how I am to go about this. Any pointers or tips to get me started would be great. This is what my previous code is [CODE][/module Lab4Part1 (KEY,SW,HEX0,HEX1,HEX2,HEX3);
input [0:0]KEY;
input [1:0]SW;
output [6:0]HEX3,HEX2,HEX1,HEX0;
wire Reset,Clock;
wire [15:0]Enable;
wire [15:0]Q;
assign Enable[0] = SW[1];
assign Reset = SW[0];
assign Clock = KEY[0];
T_FF F1(Reset,Enable[0],Clock,Q[0]);
assign Enable[1] = Q[0] & Enable[0];
T_FF F2(Reset,Enable[1],Clock,Q[1]);
assign Enable[2] = Q[1] & Enable[1];
T_FF F3(Reset,Enable[2],Clock,Q[2]);
assign Enable[3] = Q[2] & Enable[2];
T_FF F4(Reset,Enable[3],Clock,Q[3]);
assign Enable[4] = Q[3] & Enable[3];
T_FF F5(Reset,Enable[4],Clock,Q[4]);
assign Enable[5] = Q[4] & Enable[4];
T_FF F6(Reset,Enable[5],Clock,Q[5]);
assign Enable[6] = Q[5] & Enable[5];
T_FF F7(Reset,Enable[6],Clock,Q[6]);
assign Enable[7] = Q[6] & Enable[6];
T_FF F8(Reset,Enable[7],Clock,Q[7]);
assign Enable[8] = Q[7] & Enable[7];
T_FF F9(Reset,Enable[8],Clock,Q[8]);
assign Enable[9] = Q[8] & Enable[8];
T_FF F10(Reset,Enable[9],Clock,Q[9]);
assign Enable[10] = Q[9] & Enable[9];
T_FF F11(reset,Enable[10],Clock,Q[10]);
assign Enable[11] = Q[10] & Enable[10];
T_FF F12(Reset,Enable[11],Clock,Q[11]);
assign Enable[12] = Q[11] & Enable[11];
T_FF F13(Reset,Enable[12],Clock,Q[12]);
assign Enable[13] = Q[12] & Enable[12];
T_FF F14(reset,Enable[13],Clock,Q[13]);
assign Enable[14] = Q[13] & Enable[13];
T_FF F15(Reset,Enable[14],Clock,Q[14]);
assign Enable[15] = Q[14] & Enable[14];
T_FF F16(Reset,Enable[15],Clock,Q[15]);
Con h0(Q[3:0],HEX0);
Con h1(Q[7:4],HEX1);
Con h2(Q[11:7],HEX2);
Con h3(Q[15:12],HEX3);
endmodule
module Con(bin,out);
input [3:0] bin;
output [0:6] out;
reg [0:6] d;
always @(bin)
case(bin)
4'b0000 : d <= 7'b1000000; //0
4'b0001 : d <= 7'b1111001; //1
4'b0010 : d <= 7'b0100100; //2
4'b0011 : d <= 7'b0110000; //3
4'b0100 : d <= 7'b0011001; //4
4'b0101 : d <= 7'b0010010; //5
4'b0110 : d <= 7'b0000010; //6
4'b0111 : d <= 7'b1111000; //7
4'b1000 : d <= 7'b0000000; //8
4'b1001 : d <= 7'b0011000; //9
4'b1010 : d <= 7'b0001000; //A
4'b1011 : d <= 7'b0000011; //B
4'b1100 : d <= 7'b1000110; //C
4'b1101 : d <= 7'b0100001; //D
4'b1110 : d <= 7'b0000110; //E
4'b1111 : d <= 7'b0001110; //F
default : d <= 7'b1111111;
endcase
assign out = d;
endmodule
module T_FF(Reset,Enable,Clock,Q);
input Clock,Enable, Reset;
output [3:0] Q;
reg [3:0] tmp;
always @(posedge Clock or posedge Reset)
begin
if (Reset)
tmp = 4'b0000;
else if(Enable)
tmp = tmp + 1'b1;
end
assign Q = tmp;
endmoduleCODE]
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What you need to do is create an internal counter that will reset itself once a second.
I would suggest making 2 counters. The first counter should count from 0 to <Clock speed in MHz - 1>. If Clock is at 100 MHz, have your first counter (counter1) count from 0 to 99. When counter1 = 99, have it reset to 0. For the second counter, when counter1 = 99, increment counter2. When counter2 = 999999 and counter1 = 99, one second has passed and you should increment tmp and reset counter2 to 0. An alternate solution would be to have your counter count from 0 to the clock speed in Hz. The only reason I might suggest avoiding this path is for timing reasons. It really isn't as hard as it may seem. Give it a try and if you have problems, keep posting. We'll get you there.- Subscribe to RSS Feed
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